Logicbus/Salida análoga 14 o 16 bits de resolución/PD2-AO-96/16HS

MX
USA

Comprar ahora

Logicbus SA de CV

Buscar productos

Productos

PD2-AO-96/16HS
PD2-AO-96/16HS
96-channel, 16-bit, 100 kS/s per channel, high-speed PCI analog output board
Garantía de disponibilidad por 10 años
 
96-channel high-speed analog output data acquisition card. 16-bit resolution, 100 kS/s per channel update rate, 3 24-bit counter/timers, 16 digital I/O lines.
 
Characteristics:
  • For PCI bus
  • High-speed waveform generator optimized for 100 kS/s per channel
  • 9.6 MS/s aggregate update rate from DSP memory,
  • 96 analog outputs, 16-bit resolution
  • 8 digital input lines, 8 digital output lines
  • Three clock/interrupt lines, three 24-bit counters/timers
  • Each 16 channels are pin-to-pin compatible with Keithley and Measurement Computing (ComputerBoards) boards
  • User-defined power-on state
  • Simultaneous channel update
  • Onboard buffer size: 64k samples
 
Technical Specifications
Analog Outputs
Number of channels 96
Resolution 16-bit
Update rate 100 kS/s per channel @ 16-bit;
200 kS/s per channel @ 12-bit;
600 kS/s aggregate in non-DMA mode;
1600 kS/s aggregate in DMA mode;
9.6 MS/s aggregate from DSP memory, 
regenerate waveform mode
DSP buffer size 2/64k samples (software selectable)
Type of D/A double-buffered
Data transfer modes DMA, interrupt, software
Accuracy ±3 LSB max
DNL ±3 LSB max
Monotonicity over temp. 15 bits, -40 to 85°C
Calibrated gain error 3mV typ, 6mV max @ ±9.8V
Calibrated offset error 1mV typ, 2mV max @ 0.0V
Output range ±10V
Output coupling DC
Output impedance 0.15Ω max
Current drive ±5 mA min
Capacitive loads 180 pF min
Settling time 10µs to 0.003%
Slew rate 10V/µs
Gain bandwidth 1 MHz
Noise less than 2 LSB RMS, 0-10000 Hz
Output protection short to ground, ±15V
Power-on state 0.0000V ±5mV (default), user programmable
Gain drift 25 ppm/°C
Digital I/O
Number of channels 8 inputs, 8 outputs
Compatibility CMOS/TTL, 2kV ESD protected
Power-on state logic zero (default), user programmable
Data transfer modes DMA, interrupt, software
Input termination 4.7kΩ pull-up to 5V
Output high level 3.0V typ @ -32mA, 3.4V typ @ -16mA, 4.2V @ -2mA
Output low level 0.55V max @ 64mA
Input low voltage 0.0 - 0.8V
Input high voltage 2.0 - 5.0V
Counter/Timer
Number of channels 3
Resolution 24 bits
Max frequency 16.5 MS/s for external clock,
33 MS/s for internal DSP clock
Min frequency 0.00002 Hz for internal clock,
no low limit for external clock
Min pulse width 20 ns
Output high level 2.9V typ @ -4 mA
Output low level 0.5V min @ 4 mA
Protection 7 kV ESD, ±30V over/undershoot
Input low voltage 0.0 - 0.8V
Input high voltage 2.0 - 5.0V